Methods of Creating Molds of Variable Solder Volumes for Flip Attach

ABSTRACT

A solder mold includes a substrate and a plurality of cavities for holding solder to be transferred to an integrated circuit. The plurality of cavities comprises cavities of at least two different volumes.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.11/769,389, filed Jun. 27, 2007, the contents of which are hereinincorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Technical Field

The present disclosure relates to flip attach and, more specifically, tomethods of creating molds of variable solder volumes for flip attach.

2. Discussion of the Related Art

In the process of manufacturing electronic equipment, semiconductordevices, such as integrated circuits (ICs) are often encased in aprotective package and mounted onto a printed circuit board (PCB) orother electronic device.

Conventionally, semiconductor devices may be mounted onto a PCB using aseries of thin wire interconnects. However, as semiconductor devicesbecome smaller and more complex, the wire interconnects must becomethinner and closer together. Many modern semiconductor devices are sosmall and complex that wire interconnects are no longer practical.Accordingly, other methods for chip mounting have been developed.

Flip chip mounting methods are used to mount a semiconductor devicewithout the need for wire connections. In flip chip mounting, bumps ofsolder are formed on the chip's connection pads during wafer processing.The chip may then be inverted such that the solder bumps directlycontact the PCB or other associated external circuitry. Then, in aprocess called controlled collapse chip connection (C4), the solderbumps are reflowed and electrical connection is achieved.Electrically-insulating adhesive may then be used to underfill the spacebetween the chip and the PCB to provide a stronger mechanicalconnection.

Solder may be applied to a semiconductor chip to form interconnects.Methods for applying the solder bumps to the chip have been developed.For example, solder may be applied by evaporation through a shadow mask,electroplated into a Riston opening, or screen printing. Otherapproaches include injection molded solder (IMS) and direct solder ballattach.

For example, the surface of the wafer may be screened with solder pastebefore the chip die is cut. However, the solder paste, which generallyincludes flux and solder alloy particles, may lack a consistent anduniform composition, especially as the size of the solder bumpsdecreases to accommodate smaller chips. Particular care may be given toprovide for a highly uniform and consistent solder paste, however, suchcare generally comes at a high cost. Moreover, another problem withusing solder paste screening techniques in modern high density devicesis the reduced pitch between bumps. Since there is a large reduction involume from a screened paste to the resulting solder bump, the screenholes must be significantly larger in diameter than the final bumps.Thus stringent dimensional control of the bumps makes the solder pastescreening technique impractical for applications in high densitydevices.

More recently developed injection molded solder (IMS) techniques attemptto solve these problems by dispensing molten solder instead of solderpaste. According to these methods, a transfer mold having an array ofcavities is filled with injected solder. The mold is then disposed overa semiconductor chip or chip packaging substrate such that the filledcavities align with the points of electrical contact on the chip. Acombination of heat and gas pressure is applied to transfer the solderpattern onto the chip. Methods for IMS are described in U.S. Pat. Nos.5,244,143; 6,056,191; and 6,105,852, the disclosures of which are herebyincorporated by reference in their entirety.

Transfer molds are generally made of glass or polymeric substrates. Amasking material may then be deposited on the mold and a pattern ofholes may be formed on the mask. The layout of the patterned holes isdetermined by the footprint of the chip that is to receive the solderbumps. The mask is then etched to form the cavities and the mask is thenremoved. Because most etch processes are isotropic and have a constantetch rate in all directions, the diameter of the holes in the mask andthe spacing between the holes in the mask determine the diameter, pitchand etch depth of the cavities that are formed during etching.

SUMMARY

A method for fabricating a solder transfer mold includes masking asubstrate with a masking agent. A pattern is transferred to thesubstrate mask. The masked substrate is etched until cavities of a firstvolume are formed. The cavities of the first volume are selectivelycoated. The masked substrate is etched until cavities of a second volumeare formed.

A method for fabricating a solder transfer mold includes covering asubstrate having anisotropic etching properties with a masking layer.The masking layer is patterned to create a plurality of openings of atleast two different sizes. The substrate is etched through the patternedmask to generate a plurality of cavities of at least two differentvolumes.

A solder mold includes a substrate. The substrate includes a pluralityof cavities for holding solder to be transferred to an integratedcircuit. The plurality of cavities includes cavities of at least twodifferent volumes.

A method for applying solder bumps directly to an integrated circuitincludes filling a plurality of cavities within a solder mold withsolder. The solder mold is placed in proximity with the integratedcircuit. The solder is transferred from the pluralities of the cavitiesto the integrated circuit. The solder mold includes a substrate and theplurality of cavities and the plurality of cavities include cavities ofat least two different volumes.

A method for fabricating a solder transfer mold having solder cavitiesof multiple different volumes includes placing multiple alternatinglayers of a first protective material and a second protective materialon a substrate. The following etch steps are repeated: a firstprotective material etch is performed, a second protective material etchis performed, and a substrate etch is performed. The number ofalternating layer pairs is equal to the number of etch step repetitionsand is equal to the number of different volumes.

A method for generating a solder mold includes etching a first set ofcavities of a first volume in a solder mold substrate. The first set ofcavities continue to be etched while etching a second set of cavities ofa second volume. The second volume is smaller than the first volume.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete appreciation of the present disclosure and many of theattendant advantages thereof will be readily obtained as the samebecomes better understood by reference to the following detaileddescription when considered in connection with the accompanyingdrawings, wherein:

FIG. 1 is a flow chart showing a method for fabricating a transfer moldaccording to an exemplary embodiment of the present invention;

FIG. 2 illustrates an isotropic etching process for etching soldercavities using a selective deposition of metal according to an exemplaryembodiment of the present invention;

FIG. 3 illustrates a process for creating variable pitch solder moldsusing selective deposition of a polymer material as the etch barrieraccording to an exemplary embodiment of the present invention;

FIG. 4 illustrates a process for creating variable pitch solder moldsusing anisotropic etching properties of silicon according to anexemplary embodiment of the present invention;

FIGS. 5(A-M) illustrate a process for creating variable pitch soldermolds according to an exemplary embodiment of the present invention; and

FIG. 6 is a flow chart illustrating the process shown in FIGS. 5(A-M).

DETAILED DESCRIPTION OF THE DRAWINGS

In describing the exemplary embodiments of the present disclosureillustrated in the drawings, specific terminology is employed for sakeof clarity. However, the present disclosure is not intended to belimited to the specific terminology so selected, and it is to beunderstood that each specific element includes all technical equivalentswhich operate in a similar manner.

Exemplary embodiments of the present invention seek to provide injectionmolded solder (IMS) techniques that allow for solder bumps of varyingvolumes within a single transfer mold. A single transfer mold maythereby be used to transfer solder bumps of different diameter and pitchwithout having to use multiple transfer molds. For example, sometransferred solder bumps may have a diameter of 4 thousandths of an inch(mils) and a pitch of 8 mils (4-on-8), while other transferred solderbumps may have a diameter of 3 mils and a pitch of 6 mils (3-on-6), andstill other transferred solder bumps may have a diameter of 2 mils and apitch of 4 mils (2-on-4), etc.

FIG. 1 is a flow chart showing a method for fabricating a transfer moldaccording to an exemplary embodiment of the present invention. First, amold substrate, for example, a substrate of glass, silicon or apolymeric substrate, may be masked with a masking agent (Step S10). Thedesired pattern for the solder bumps may be transferred onto the maskingagent (Step S11). The pattern may include features having any desiredcombination of diameter and pitch. For example, some features may be4-on-8, some may be 3-on-6 and some may be 2-on-4, etc. Pattern transfermay be executed using known techniques, for example, photolithographictechniques. After the desired pattern has been transferred, an etchingprocess may be performed (Step S12). For example, the masked moldsubstrate may be wet etched. Etching may continue until the cavitieswith the smallest volume, for example, the 2-on-4 cavities, are fullyformed. At this point, cavities having larger volumes may be less thanfully etched. The fully formed cavities may then be masked off (StepS13). After the fully formed cavities are masked, etching may continueon all of the cavities that remain unmasked (Step S14). Etching maycontinue until the cavities with the next-smallest volume, for example,the 3-on-6 cavities, are fully formed. The fully formed cavities maythen be masked off and etching may continue again. The steps of maskingoff the fully formed cavities (Step S13) and etching the remainingcavities (Step S14) may be repeated until the cavities with the largestvolume, for example, the 4-on-8 cavities, are fully formed. After allcavities are fully formed (Yes, Step S15), the masking layers may beremoved (Step S16).

Many available techniques may be used to mask off the fully formedcavities to prevent over-etching and allow for multiple cavities ofvarious sized on a single mold substrate. According to one exemplaryembodiment of the present invention, fully formed cavities of the moldmay be selectively coated with a metal layer to prevent over-etching.Accordingly, a metal layer may be used as a sacrificial mask to preventover-etching in fully formed cavities.

According to another exemplary embodiment of the present invention, apolymer may be deposited into fully formed cavities of the mold toprevent over-etching. The polymer may be defined by either standardphotolithographic techniques, for example, photo-imageable polymide, orby selective removal using laser ablation.

According to another exemplary embodiment of the present invention, themold substrate may be made of anisotropic crystalline silicon. Whenusing such a substrate, the process is self-limiting and the diameter ofthe hole of a single masking layer will automatically determine thefinal depth of the fully formed cavity. Accordingly, a single mask and asingle etching operation may be sufficient to create fully formedvarieties of varying sizes and volumes.

FIG. 2 illustrates an isotropic etching process for etching soldercavities using a selective deposition of metal according to an exemplaryembodiment of the present invention. Accordingly, a multiple pitch IMSsolder mold may be created by using selective deposition of a metalmasking layer to protect fully formed cavities from over-etch whileetching continues on cavities with larger volumes. As seen in FIG. 2, asubstrate 21 is used. The substrate 21 may be, for example, a glasssubstrate. A metal film 23, for example, a copper film, is formed on thesubstrate 21. The metal film may be formed on the substrate 21 usingknown techniques such as vapor deposition and/or sputtering. Aphotoresist layer 22 may be formed over the metal film 23 using knowntechniques such as spin coating. The photoresist layer 22 may then bepatterned with the pattern of multiple features having a desiredcombination of diameter and pitch. Pattern transfer may be carried outusing known techniques such as photolithography. The patternedphotoresist layer 22 may then be etched using known etching techniques.FIG. 2A shows the IMS solder mold after etching of the resist layer 22and the metal layer 23 have been accomplished.

Resist removal and wet isotropic mold etching may be performed. Etchingmay continue until the smallest cavities are fully formed. FIG. 2B showsthe result of this step. After the smallest cavities are fully formed,the mold is aligned to a metal mask 24 to selectively mask the fullyformed cavities. A metal film is then locally deposited inside the fullyformed cavities and further mold etching in these locations isterminated. FIG. 2C shows the IMS solder mold after the metal film 23has been locally deposited inside the fully formed cavities.

The metal mask 24 may be removed and etching may resume until thenext-higher volume cavities are fully formed. In FIG. 2, only twodifferent sized cavities are shown, however, any number of differentsized cavities may be created by additional steps of masking fullyformed cavities. FIG. 2D shows the IMS solder mold with the largervolume cavities fully formed. The metal layer 23 may finally be removed,for example, through wet etch removal. FIG. 2E shows the completed IMSsolder mold with the metal layer 23 having been removed.

FIG. 3 illustrates a process for creating variable pitch solder moldsusing selective deposition of a polymer material as the etch barrieraccording to an exemplary embodiment of the present invention. As seenin FIG. 3, a substrate 31 is used. The substrate 31 may be, for example,a glass substrate.

As seen in FIG. 3, a metal film 32 may be formed on the substrate 31using known techniques such as vapor deposition and/or sputtering. Aresist layer 33 may be formed over the metal film 32 using knowntechniques such as spin coating. The resist layer 33 may then bepatterned with the pattern of multiple features having a desiredcombination of diameter and pitch. Pattern transfer may be carried outusing known techniques such as photolithography. The patterned resistlayer 33 may then be etched using known etching techniques. FIG. 3Ashows the IMS solder mold after etching of the resist layer 33 and themetal layer 32 have been accomplished.

Resist removal and wet isotropic mold etching may be performed. Etchingmay continue until the smallest cavities are fully formed. FIG. 3B showsthe result of this step. After the smallest cavities are fully formed,the smallest cavities of the substrate 31 may be filled with asacrificial polymer 34. The sacrificial polymer may be selected to bestable at the temperatures used to fill, transfer, and reflow. Forexample, the polymer may be polyimide. Alternatively, the fully formedcavities may be filled with any substance that is impervious to thesubstrate etching technique used. For example, the selected substancemay be a metal that does not react with glass etchants. FIG. 3C showsthe sacrificial polymer layer 34 filling the fully etched cavities.

Where the selected polymer 34 is curable, the polymer 34 may be cured toprevent over etching when etching continues. Etching may then resumeuntil the next-higher volume cavities are fully formed. In FIG. 3, onlytwo different sized cavities are shown, however, any number of differentsized cavities may be created by additional steps of filling fullyformed cavities with the polymer or other selected substances and, whereappropriate, curing the polymer, and resuming etching. FIG. 3D shows theIMS solder mold with the larger volume cavities fully formed. The metallayer 32 may finally be removed, for example, through wet etch removal.A process technique may be used to remove the sacrificial polymer layer34 or other protective substance from the cavities. For example, laserablation may be used to remove the sacrificial polymer layer 34 or otherprotective substance. For example, plasma ashing, reactive ion etching(RIE) and/or chemical stripping may be used to remove the sacrificialpolymer layer 34 or other protective substance. FIG. 3E shows thecompleted IMS solder mold with the metal layer 32 and the sacrificialpolymer layer 34 having been removed.

The completed IMS solder mold may then be used to transfer solder onto adie by filling the cavities with solder and transferring the solder ontothe die. Here, known solder transfer processes may be used.

FIG. 4 illustrates a process for creating variable pitch solder moldsusing anisotropic etching properties of silicon according to anexemplary embodiment of the present invention. In FIG. 4, rather thanusing a glass substrate, a substrate of crystalline silicon, or anothermaterial with anisotropic etching properties may be used as a substratefor an IMS solder mold.

The substrate 44 may comprise, for example, a single silicon crystalwith a (100) orientation. First, the crystal substrate may be oxidizedto provide an oxidation layer 45. The oxidation layer 45 may be, forexample, approximately 5000 Å thick. The oxidation layer 45 may then bepatterned, for example, with square or rectangular features. Thepatterning may be accomplished, for example, using lithographictechniques. The patterned oxidation layer 45 may then be etched, forexample, etched in BHF, to open one or more oxide windows 46 and 47 ofvarying sizes. For example, a smaller oxide window 46 may be 1 mil by 1mil and a larger oxide window 47 may be 2 mil by 2 mil. Anisotropic wetetching may then be performed on the substrate 44 masked by thepatterned oxidation layer 45. The wet etch may be performed, forexample, using EPPW or KOH solution or any chemistry suited foranisotropic etching of silicon.

When the side of the square or rectangular features are aligned to the(110) direction of the wafer, the resulting etch cavities are pyramidshaped with four sides following the (111) plane. The resulting pyramidshaped cavities are self-limiting in size. Due to the anisotropic natureof the silicon substrate, the volumes of the resultant cavities are adirect result of the size and shape of the patterned opening.Accordingly, larger openings may result in deeper cavities. Thetriangles 48 and 49 in FIG. 4 represent the geometry of the resultantcavities for the given openings. The smaller opening 46 results inlesser substrate 44 penetration (shown with triangle 48) while thelarger opening 47 results in greater substrate 44 penetration (shownwith triangle 49). For example, the smaller opening 46 (1 mil by 1 mil)may result in a cavity with a volume of 0.236 mil³ while the largeropening 47 (2 mil by 2 mil) may result in a cavity with a volume of1.886 mil³. Due to imperfect anisotropic etch, the actual pyramid volumemay increase in size about 10% and this increase may be factored intothe design of the oxide openings 46 and 47.

After the cavities have been formed, a final oxidation step may beperformed to provide a protective oxide layer (not shown) over thesubstrate 44. Accordingly, cavities of various volumes may be obtainedwith a single fabrication process flow.

FIGS. 5(A-M) illustrate a process for creating variable pitch soldermolds according to an exemplary embodiment of the present invention.First, a mold substrate 51, for example, made of glass, is covered withalternating layers of protective metal layers with varying etchsensitivities, for example, copper and chromium. The number of layers isdetermined by the number of different sized solder volumes. In theexample shown, there are two different sized solder volumes, so thereare accordingly two sets of alternating layers. Where more sized soldervolumes are needed, more layers may be added and the disclosed processmay be extrapolated to accommodate the additional layers.

As seen in FIG. 5A, the glass mold substrate 51 is covered by a firstchromium layer 52, a first copper layer 53, a second chromium layer 54and a second copper layer 55. More alternating layers may be used forimplementations having volumes of more than two sizes.

Each copper layer may be approximately 500 to 5000 Angstroms thick. Eachchromium layer may be approximately 100-200 Angstroms thick.

As seen in FIG. 5B, the alternating chromium and copper layers arecovered by a first photoresist layer 56. The first photoresist layer 56may be patterned to create openings for the volumes having the largestsize. Here, the pattern is represented by the first openings 57. Thefirst photoresist 56 and openings 57 together form a first photomask.

Again, it is noted that the alternating layers may be of materials otherthan copper and chromium as long as the layers have different etchsensitivities, however, as described herein, copper and chromium areillustrated to is provide a simple example.

As seen in FIG. 5C, a first copper etch may be performed through theholes 57 of the first photoresist layer 56. The first copper etch shouldremove the top copper layer 55 under the holes 57. Then, as seen in FIG.5D, a first chromium etch may be performed. The first chromium etchshould remove the top chromium layer 54 under the holes 57. The firstchromium etch may either be performed through the holes 57 of the firstphotoresist layer 56 or the first photoresist layer 56 may be removedand the first chromium etch may be performed through the holes in thefirst copper layer created during the first copper etch.

Then as seen in FIG. 5E, the first photoresist layer 56 may be removed,if it had not already been removed in the previous step, and a secondphotoresist layer 57 may be applied. The second photoresist layer 57 maythen be patterned with the first openings 57 corresponding to the largervolumes and second openings 58 corresponding to smaller volumes. Then,as seen in FIG. 5F, a second copper etch may be performed removing thelower copper layer 53 under the holes 57 and the upper copper layer 55under the holes 58 and the second photoresist layer 57 may be removed.

Then, as seen in FIG. 5G, the upper copper layer 55 may be thickened tocreate a thicker upper copper layer 58. The thicker copper layer 58 mayprovide additional mechanical support for the film stack to helpminimize the risk of collapse during etching and drying steps. Thethickened copper layer 58 may be approximately 1-5 microns thick.

Then, as seen in FIG. 5H, a second chromium etch may be performedremoving the lower chromium layer 52 from under the holes 57 and theupper chromium layer 54 from under the holes 58.

Then, as seen in FIG. 5I, a first glass etch may be performed so thatthe glass under the holes 57 may be partially etched. The first glassetch may be followed by a second copper etch (FIG. 5J) and a secondchromium etch (FIG. 5K). Then, as seen in FIG. 5L, a second glass etchmay be performed so that the glass under the holes 57 may be furtheretched and the glass under the holes 58 may be etched. After the filmstack is removed, the glass mold having multiple volumes is completed(FIG. 5M).

Where there are to be more than two different sized volumes, additionalcopper/chromium layers may be used and additional copper/chromium/glassetch steps may be performed until all volumes are fully etched to theirrespective desired volumes.

This process is illustrated in FIG. 6. First, a substrate layered withalternating layers of chromium and copper (one such set of layers foreach cavity size) is patterned (Step S601). The patterning step includesapplying a masking layer and then patterning the mask. The first timepatterning occurs; patterning is performed for the openingscorresponding to the largest cavities. Then, copper etch (Step S602) maybe performed. The mask may be removed at any point in this process butmay be removed, for example between the copper etch (Step S602) and achromium etch (Step 603). Next, chromium etch (Step S603) may beperformed. Then, a glass etch step may be performed (Step S604) to beginsubstrate etch for the largest cavities.

If all cavities have been fully etched (yes, Step S605) then the processis complete. However, if all cavities have not been fully etched (no,Step S605) then a new mask is applied (Step S601) such that allpreviously patterned openings are opened again along with thenext-largest set of cavities (Step S606). This process continues untilall cavities are fully etched. Because of the layered approach, thefirst glass etch step only etches the largest cavity, the next glassetch step further etches the largest cavity and begins etching thenext-largest cavity, additional glass etch steps proceed accordinglyuntil all cavities have been fully etched. The length of time the glassetch steps are performed for are calculated according to the desiredetch volume for each cavity.

According to this approach, where there are cavities of two sizes, thelarger cavity will be etched twice and the smaller cavity will be etchedonce, as illustrated above with reference to FIGS. 5(A-M). Where thereare cavities of three sizes, the largest cavity will be etched threetimes, the middle cavity will be etched twice and the smallest cavitywill be etched once. The duration for each etch step may be calculatedaccordingly, and each etch step need not have equal duration. By varyingthe duration of each etch step, the desired volume of the cavities maybe achieved.

Because the top layer may be the copper layer, at some point in theprocess, for example, after the first copper etch (Step S602), the topcopper layer may be thickened. The thickened copper layer may provideenhanced structural support for the film stacks and may minimize therisk of the film stacks collapsing during glass etch.

The above specific exemplary embodiments are illustrative, and manyvariations can be introduced on these embodiments without departing fromthe spirit of the disclosure or from the scope of the appended claims.For example, elements and/or features of different exemplary embodimentsmay be combined with each other and/or substituted for each other withinthe scope of this disclosure and appended claims.

1. A solder mold comprising: a solder mold substrate; and a plurality ofcavities within the substrate for holding solder to be transferred to anintegrated circuit, wherein the plurality of cavities comprises cavitiesof at least two different volumes, wherein the plurality of cavitiescomprises cavities that recur with at least two different spatialintervals.
 2. (canceled)
 3. The solder mold of claim 1, wherein thesubstrate comprises glass.
 4. The solder mold of claim 1, wherein thesubstrate has anisotropic etching properties.
 5. The solder mold ofclaim 1, wherein the substrate comprises crystalline silicon.
 6. Thesolder mold of claim 1, wherein the plurality of cavities are eachsquare-shaped or rectangle-shaped.
 7. A solder mold comprising: a soldermold substrate; and a plurality of cavities within the substrate forholding solder to be transferred to an integrated circuit, wherein theplurality of cavities comprises cavities of at least a first volume anda second volume, wherein the first volume is about 10% larger than thesecond volume.
 8. The solder mold of claim 7, wherein the plurality ofcavities comprises cavities that recur with at least two differentspatial intervals
 9. The solder mold of claim 7, wherein the substratecomprises glass.
 10. The solder mold of claim 7, wherein the substratehas anisotropic etching properties.
 11. The solder mold of claim 7,wherein the substrate comprises crystalline silicon.
 12. The solder moldof claim 7, wherein the plurality of cavities are each square-shaped orrectangle-shaped.
 13. A solder mold comprising: a solder mold substrate;and a plurality of cavities within the substrate for holding solder tobe transferred to an integrated circuit, wherein the plurality ofcavities comprises cavities of at least a first volume that is about1.886 mil³ and a second volume that is about 0.236 mil³.
 14. The soldermold of claim 13, wherein the plurality of cavities comprises cavitiesthat recur with at least two different spatial intervals
 15. The soldermold of claim 13, wherein the substrate comprises glass.
 16. The soldermold of claim 13, wherein the substrate has anisotropic etchingproperties.
 17. The solder mold of claim 13, wherein the substratecomprises crystalline silicon.
 18. The solder mold of claim 13, whereinthe plurality of cavities are each square-shaped or rectangle-shaped.